The universal serial bus (USB) has a variety of operating modes that allow a number of computer peripherals to be connected to a generic port. One of the modes of a USB device is a high speed mode. One design criteria involved with USB devices is that the crossover voltage of the differential signals must be tightly controlled. As a result, the USB device must be designed to provide the proper crossover at the output across voltage, temperature, and device processing variations.
A universal serial bus (USB) driver may take a single data and have an increment and a decrement signal. The increment and decrement signals are exclusive of each other. The signals cause the edge relationship of the two outputs to either lead/lag or lag/lead. The signals cause the entire waveform to either lead or to lag without distorting the waveform. Conventional approaches would change the rise or fall time of the signals in addition to varying the delay. These rise/fall time distortions can cause problems in the output driver stages. An example of a circuit that delays a single edge may be found in co-pending application "METHODS, CIRCUITS AND DEVICES FOR IMPROVING CROSSOVER PERFORMANCE AND/OR MONOTONICITY, AND APPLICATIONS OF THE SAME IN A UNIVERSAL SERIAL BUS (USB) LOW SPEED OUTPUT DRIVER", Ser. No. 08/934,933, Filed Sep. 22, 1997, which is hereby incorporated by reference in its entirety.
Alternately, two separate drivers could be implemented. However, this would be at the expense of additional associated overhead. Each universal serial bus device has two outputs, a plus output and a minus output. A driver circuit implementing separate drivers would have to be implemented, at a minimum, at each of the plus and minus outputs. In an application that provides a number of universal serial bus outputs on a single device, the number of instances that a driver would have to be duplicated increases accordingly. As a result, it is desirable for the number of components in a driver circuit be kept to a minimum in order to reduce the overall area required to implement the plurality of required buffers at the various outputs.